Zilog EZ80F916 - Manual (Page 298)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
289
RES b, (IX/Y+d)
Reset Bit
Operation
(IX/Y+d)[b]  0
Description
The (IX/Y+d) operand is an 8-bit value at the memory location specified by the contents
of the Index Register, IX or IY, added to the two’s-complement displacement d. Bit b of
this value is reset to 0.
Condition Bits Affected
None.
Attributes
kk
= binary code
10 bbb 110
; where
bbb
identifies the bit tested and is assembled into
the object code as indicated in Table 81 .
Mnemonic Operand ADL Mode Cycle Opcode (hex)
RES b
,(IX+d) X 5
DD, CB, dd, kk
RES
.S
b
,(IX+d) 1 6
52, DD, CB, dd, kk
RES
.L
b
,(IX+d) 0 6
49, DD, CB, dd, kk
RES b
,(IY+d) X 5
FD, CB, dd, kk
RES
.S
b
,(IY+d) 1 6
52, FD, CB, dd, kk
RES
.L
b
,(IY+d) 0 6
49, FD, CB, dd, kk