Ld mb, a – Zilog EZ80F916 User Manual
Page 224
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
215
LD MB, A
Load MBASE
Operation
MBASE A
Description
In ADL mode (ADL mode bit = 1), the CPU writes the contents of the accumulator, A, to
the MBASE register. otherwise., no operation occurs (two-cycle NOP).
Condition Bits Affected
None.
Attributes
Mnemonic Operand
ADL Mode Cycle
Opcode (hex)
LD
MB,A
X
2
ED, 6D
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