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Jp (ix/y), Operation, Description – Zilog EZ80F916 User Manual

Page 192: Condition bits affected, Attributes

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eZ80

®

CPU

User Manual

UM007715-0415

CPU Instruction Set

183

JP (IX/Y)

Jump Indirect

Operation

PC  IX/Y

Description

The Program Counter is loaded with the contents of the specified Index Register, IX or IY.

Table 60

provides more detailed information on this instruction, particularly when switch-

ing between ADL and Z80 modes.

Condition Bits Affected

None.

Attributes

Table 60. JP (IX/Y) Instruction Detail

ADL

Suffix

Operation

0

None or
.S

The starting Program Counter is {MBASE, PC[15:0]}. Write the 2-byte

value stored in IX/Y[15:0] to PC[15:0]. The ADL mode bit remains

cleared to 0. The ending Program Counter is {MBASE,

PC[15:0]} = {MBASE, IX/Y[15:0]}.

1

None or

.L

The starting Program Counter is PC[23:0]. Write the 3-byte value stored

in IX/Y[23:0] to PC[23:0]. The ADL mode bit remains set to 1. The

ending Program Counter is PC[23:0] = IX/Y[23:0].

0

.L

The starting Program Counter is {MBASE, PC[15:0]}. Write the 3-byte

value stored in IX/Y[23:0] to PC[23:0]. Set the ADL mode bit to 1. The

ending Program Counter is PC[23:0] = IX/Y[23:0].

1

.S

The starting Program Counter is PC[23:0]. Write the 2-byte value stored

in IX/Y[15:0] to PC[15:0]. Reset ADL mode bit to 0. The ending Program

Counter is {MBASE, PC[15:0]} = {MBASE, IX/Y[15:0]}.

Mnemonic Operand

ADL Mode Cycle

Opcode (hex)

JP

(IX)

1

4

DD, E9

JP.S

(IX)

X

5

40, DD, E9

JP.L

(IX)

X

5

5B, DD, E9

JP

(IY)

1

4

FD, E9

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