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Ez80® cpu instruction notations, Ez80, Cpu instruction notations – Zilog EZ80F916 User Manual

Page 62

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eZ80

®

CPU

User Manual

UM007715-0415

CPU Instruction Set

53

description of instruction operands. The nomenclature is defined with special emphasis on

mnemonic values and readability.
The movement of data is indicated by a single opcode, regardless whether the movement

is between different registers or between registers and memory locations. For example, the

first operand of an LD instruction is the destination of the operation and the second

operand is the source of the operation. Thus, LD A, B indicates that the contents of the

second operand, working register B, are to be transferred to the first operand, which is the

accumulator, A. In the opcode descriptions, this operation is often represented as:
A

B

Similarly, LD C,

3Fh

indicates that the constant

3Fh

is written to working register C:

C

3Fh

Enclosing an operand in parentheses indicates a memory location addressed by the

contents of the parentheses (i.e. an indirect memory access). For example, LD BC, (HL)

indicates that the contents of the multibyte HL register are used as an address to a memory

location. Multi-byte register BC is loaded with the data stored at the memory location

pointed to by the contents of HL:
BC

(HL)

Similarly, LD (IX+6), C indicates that the contents of register C are to be stored in the

memory location addressed by the current value in the multibyte IX register plus 6:
(IX+6)

C

eZ80

®

CPU Instruction Notations

The notations in the CPU instructions are defined in

Table 26

.

Table 26. Instruction Notations

Mnemonic

Definition

cc

Condition code C, NC, Z, NZ, P, M, PO, or PE—tests of

single bits in Flags register

cc’

Condition code C, NC, Z, or NZ—tests of single bits in

Flags register

d

An 8-bit two’s complement displacement with value from

–128 to 127

ir

or ir’

8-bit CPU register IXH (IX[15:8]), IXL (IX[7:0]), IYH

(IY[15:8]), or IYL (IY[7:0])

IX/Y

CPU Index Register IX or IY

(IX/Y+d)

A location in memory with address formed by the sum of

the contents of the Index Register, IX or IY, and the two’s-

complement

displacement

d

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