Zilog EZ80F916 - Manual (Page 159)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
150
IN A, (n)
Input from I/O
Operation
A  ({UU, A, n})
Description
The n operand is placed on the lower byte of the address bus, ADDR[7:0]; the contents of
the accumulator, A, are placed on the middle byte of the address bus, ADDR[15:8]. The
upper byte of the address bus, ADDR[23:16] is undefined for I/O addresses. The byte at I/
O address {UU, A, n} is written to the accumulator.
Condition Bits Affected
None.
Attributes
Mnemonic Operand ADL Mode Cycle Opcode (hex)
IN
(n) X 3
DB, nn