Zilog EZ80F916 - Manual (Page 252)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
243
LEA IX/Y, IY+d
Load Effective Address
Operation
IX/Y
 IY+d
Description
The CPU adds the contents of the IY register to the two’s-complement displacement d and
writes the sum to the specified multibyte Index Register, IX or IY.
Condition Bits Affected
None.
Attributes
Mnemonic Operand ADL Mode Cycle Opcode (hex)
LEA
IX,IY+d X 3
ED, 54, dd
LEA.S
IX,IY+d 1 4
52, ED, 54, dd
LEA.L
IX,IY+d 0 4
49, ED, 54, dd
LEA
IY,IY+d X 3
ED, 33, dd
LEA.S
IY,IY+d 1 4
52, ED, 33, dd
LEA.L
IY,IY+d 0 4
49, ED, 33, dd