Zilog EZ80F916 - Manual (Page 373)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
364
TST A, n
Test
Operation
A AND n
Description
The 8-bit immediate value n is bitwise ANDed with the contents of the accumulator, A.
The appropriate flags are set to 1, depending on the result of the AND logical operation.
The contents of the accumulator are not altered.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Set.
P/V
Set if parity is even; reset otherwise.
N
Reset.
C
Reset
Mnemonic Operand ADL Mode Cycle Opcode (hex)
TST
A,n X 3
ED, 64, nn