Zilog EZ80F916 - Manual (Page 33)

eZ80
®
CPU
User Manual
UM007715-0415 Memory Mode Switching
24
;no effect because instruction

;length is unambiguous.
LD.LIS (HL), BC ;24-bit value stored in BC[23:0]

;is written to the 24-bit memory

;location given by HL[23:0].
;Because it is operating in ADL

;Mode, the.L portion of the suffix

;has no effect on this instruction

;execution.

;The .IS portion of the suffix has

;no effect because instruction

;length is unambiguous.

Suffix Completion by the Assembler
Ultimately, the assembler for the CPU creates one of the four full suffixes .SIS, .SIL,
.LIS
, or .LIL, depending on the current memory mode. Often, you are not required to
write the entire suffix. Partial suffixes (.S, .L, .IS, or .IL) can be employed. If .S, .L, .IS,
or .IL is used by the code developer, the remainder of the full suffix is deduced from the
current memory mode state. The suffix completion by the assembler is listed in Table 11 .
Assembly of the Opcode Suffixes
During assembly, the opcode suffixes become prefixes in the assembled code. The proces-
sor must know what type of memory mode exceptions must be applied to the instruction to
follow. The four assembled prefixes that correspond to the four full suffixes are displayed
in Table 12 .
Table 11. Opcode Suffix Completion by the Assembler
CPU Code

Partial Suffix ADL Mode Bit
Full Suffix Used
by CPU Assembler
.S
0
.SIS
.S
1
.SIL
.L
0
.LIS
.L
1
.LIL
.IS
0
.SIS
.IS
1
.LIS
.IL
0
.SIL
.IL
1
.LIL