Zilog EZ80F916 - Manual (Page 18)

eZ80
®
CPU
User Manual
UM007715-0415 Registers and Bit Flags
9
Registers and Bit Flags
eZ80
®
CPU Working Registers
The CPU contains two banks of working registers—the main register set and the alternate
register set. The main register set contains the 8-bit accumulator register (A) and six 8-bit
working registers (B, C, D, E, H, and L). The six 8-bit working registers can be combined
to function as the multibyte register pairs BC, DE, and HL. The 8-bit Flag register F com-
pletes the main register set.
Similarly, the alternate register set also contains an 8-bit accumulator register (A’) and six
8-bit working registers (B’, C’, D’, E’, H’, and L’). These six 8-bit alternate working regis-
ters can also be combined to function as the multibyte register pairs BC’, DE’, and HL’.
The 8-bit Flag register F’ completes the alternate register set.
High-speed exchange between these two register banks is performed. See the
EX and
EXX instructions on pages 143 through 147 for directions on exchanging register bank
contents. High-speed exchange between these banks can be used by a single section of
application code. Alternatively, the main program could use one register bank while the
other register banks are allocated to interrupt service routines.
eZ80
®
CPU Control Register Definitions
In addition to the two working register sets described in the previous section, the CPU
contains several registers that control CPU operation.
• Interrupt Page Address Register (I)—the 16-bit I register stores the upper 16 bits of
the interrupt vector table address for Mode 2 vectored interrupts.
The 16-bit I register is not supported on eZ80190, eZ80L92, or eZ80F92/F93 devices.
• Index Registers (IX and IY)—the multibyte registers IX and IY allow standard
addressing and relative displacement addressing in memory. Many instructions
employ the IX and IY registers for relative addressing in which an 8-bit two’s-comple-
ment displacement (d) is added to the contents of the IX or IY register to generate an
address. Additionally, certain 8-bit opcodes address the High and Low bytes of these
registers directly. For Index Register IX, the High byte is indicated by IXH, while the
Low byte is indicated by IXL. Similarly, for Index Register IY, the High byte is indi-
cated by IYH, while the Low byte is indicated by IYL.
• Z80 Memory Mode Base Address (MBASE) register—the 8-bit MBASE register
determines the page of memory currently employed when operating in Z80 mode. The
MBASE register is only used during Z80 mode. However, the MBASE register can
only be altered from ADL mode.
Note: