Zilog EZ80F916 - Manual (Page 354)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
345
SLA r
Shift Left Arithmetic
Operation
Description
The r operand is any of the 8-bit CPU registers A, B, C, D, E, H, or L. The CPU manipu-
lates the contents of the r operand by shifting them left one bit position. The CPU next
copies bit 7 into the Carry Flag and copies a 0 into bit 0 of the r operand.
Condition Bits Affected
Attributes
jj
identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes
indicated in Table 99 .
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Reset.
P/V
Set if parity is even; reset otherwise.
N
Reset.
C
Data from bit 7 of the source.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
SLA r
X 2
CB, jj
C 7 0
r
0