Zilog EZ80F916 - Manual (Page 24)

eZ80
®
CPU
User Manual
UM007715-0415 Registers and Bit Flags
15
where:
C = Carry Flag
N = Add/Subtract Flag
P/V = Parity/Overflow Flag
H = Half-Carry Flag
Z = 0 Flag
S = Sign Flag
X = Not used
Each of the two CPU flag registers contain six bits of status information that are set or
reset by CPU operations. Bits 3 and 5 are not used. Four of these bits are testable (C, P/V,
Z and S) for use with conditional jump, call or return instructions. Two flags are not test-
able (H, N) and are used for BCD arithmetic.
Carry Flag (C)
The Carry Flag bit is set or reset, depending on the operation that is performed. For ADD
instructions that generate a carry and SUBTRACT instructions that generate a borrow, the
Carry flag is set to 1. The Carry flag is reset by an ADD that does not generate a carry, and
a subtract that does not generate a borrow. This saved carry facilitates software routines
for extended precision arithmetic. Also, the DAA instruction sets the Carry flag to 1 if the
conditions for making the decimal adjustment are met.
For the RLA, RRA, RLC and RRC instructions, the Carry flag is used as a link between
the least significant bit (lsb) and most significant bit (msb) for any register or memory
location. During the RLCA, RLC m and SLA m instructions, the carry contains the last
value shifted out of bit 7 of any register or memory location. During the RRCA, RRC m,
SRA m
and SRL m instructions, the carry contains the last value shifted out of bit 0 of
any register or memory location. For the logical instructions AND A s, OR A s, and XOR
A s
, the carry is reset. The Carry flag can also be set (SCF) and complemented (CCF).
Add/Subtract Flag (N)
The Add/Subtract (N) flag is used by the decimal adjust accumulator instructions (DAA)
to distinguish between ADD and SUBTRACT instructions. For all ADD instructions, N
is set to 0. For all SUBTRACT instructions, N is set to 1.
Parity/Overflow Flag (P/V)
The Parity/Overflow (P/V) flag is set or reset, depending on the operation that is per-
formed. For arithmetic operations, this flag indicates an overflow condition when the
result in the accumulator is greater than the maximum possible number (+127) or is less
than the minimum possible number (–128). This overflow condition can be determined by
examining the sign bits of the operands.