Zilog EZ80F916 User Manual
Page 149
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
140
DI
Disable Interrupt
Operation
IEF1 0
IEF2 0
Description:
This instruction disables the maskable interrupts by resetting the interrupt enable flags
(IEF1 and IEF2).
Condition Bits Affected
None.
Attributes
Mnemonic
Operand
ADL Mode
Cycle
Opcode (hex)
DI
—
X
1
F3
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