Zilog EZ80F916 - Manual (Page 339)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
330
SBC A, ir
Subtract with Carry
Operation
A  A – ir – C
Description
The rr operand is any of the 8-bit registers IXH, IXL, IYH, IYL. The ir operand and the
Carry Flag (C) are subtracted from the contents of the accumulator, A. The result is writ-
ten to the accumulator.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Set if borrow from bit 4; reset otherwise.
P/V
Set if overflow; reset otherwise.
N
Set.
C
Set if borrow; reset otherwise.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
SBC
A,IXH X 2
DD, 9C
SBC
A,IXL X 2
DD, 9D
SBC
A,IYH X 2
FD, 9C
SBC
A,IYL X 2
FD, 9D