Ld ir, n, Operation, Description – Zilog EZ80F916 User Manual
Page 212: Condition bits affected, Attributes
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
203
LD ir, n
Load
Operation
ir
n
Description
The ir operand is any of the 8-bit CPU registers IXH, IXL, IYH, or IYL. The 8-bit imme-
diate value n is written to the specified register ir.
Condition Bits Affected
None.
Attributes
Mnemonic Operand
ADL Mode Cycle
Opcode (hex)
LD
IXH,n
X
2
DD, 26
LD
IXL,n
X
2
DD, 2E
LD
IYH,n
X
2
FD, 26
LD
IYL,n
X
2
FD, 2E
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