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Ld r, ir, Operation, Description – Zilog EZ80F916 User Manual

Page 231: Condition bits affected, Attributes

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eZ80

®

CPU

User Manual

UM007715-0415

CPU Instruction Set

222

LD r, ir

Load Register

Operation

r

ir

Description

The r operand is any of the 8-bit CPU registers A, B, C, D, or E. The ir operand is any of

the 8-bit registers IXH, IXL, IYH, or IYL. The CPU writes the contents of the specified ir

register to the selected r register.

Condition Bits Affected

None.

Attributes

Mnemonic Operand

ADL Mode Cycle

Opcode (hex)

LD

A,IXH

X

2

DD, 7C

LD

A,IXL

X

2

DD, 7D

LD

A,IYH

X

2

FD, 7C

LD

A,IYL

X

2

FD, 7D

LD

B,IXH

X

2

DD, 44

LD

B,IXL

X

2

DD, 45

LD

B,IYH

X

2

FD, 44

LD

B,IYL

X

2

FD, 45

LD

C,IXH

X

2

DD, 4C

LD

C,IXL

X

2

DD, 4D

LD

C,IYH

X

2

FD, 4C

LD

C,IYL

X

2

FD, 4D

LD

D,IXH

X

2

DD, 54

LD

D,IXL

X

2

DD, 55

LD

D,IYH

X

2

FD, 54

LD

D,IYL

X

2

FD, 55

LD

E,IXH

X

2

DD, 5C

LD

E,IXL

X

2

DD, 5D

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