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Ld a, (ix/y+d), Operation, Description – Zilog EZ80F916 User Manual

Page 199: Condition bits affected, Attributes

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eZ80

®

CPU

User Manual

UM007715-0415

CPU Instruction Set

190

LD A, (IX/Y+d)

Load Accumulator

Operation

A  (IX/Y+d)

Description

The CPU writes the contents of the memory location specified by the contents of the IX or

IY register offset by the two’s-complement displacement, d, to the accumulator, A.

Condition Bits Affected

None.

Attributes

Mnemonic Operand

ADL Mode Cycle

Opcode (hex)

LD

A,(IX+d)

X

4

DD, 7E, dd

LD.S

A,(IX+d)

1

5

52, DD, 7E, dd

LD.L

A,(IX+d)

0

5

49, DD, 7E, dd

LD

A,(IY+d)

X

4

FD, 7E, dd

LD.S

A,(IY+d)

1

5

52, FD, 7E, dd

LD.L

A,(IY+d)

0

5

49, FD, 7E, dd

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