And a, (ix/y+d), Operation, Description – Zilog EZ80F916 User Manual
Page 111: Condition bits affected attributes
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
102
AND A, (IX/Y+d)
Logical AND
Operation
A A AND (IX/Y+d)
Description
The (IX/Y+d) operand is the 8-bit value stored in the memory location specified by the
contents of the Index Register, IX or IY, added to the two’s-complement displacement d.
This 8-bit value is bitwise ANDed with the contents of the accumulator, A. The result is
stored in the accumulator.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Set.
P/V
Set if parity is even; reset otherwise.
N
Reset.
C
Reset.
Mnemonic
Operand
ADL Mode
Cycle
Opcode (hex)
AND
A,(IX+d)
X
4
DD, A6, dd
AND.S
A,(IX+d)
1
5
52, DD, A6, dd
AND.L
A,(IX+d)
0
5
49, DD, A6, dd
AND
A,(IY+d)
X
4
FD, A6, dd
AND.S
A,(IY+d)
1
5
52, FD, A6, dd
AND.L
A,(IY+d)
0
5
49, FD, A6, dd