Zilog EZ80F916 - Manual (Page 16)

eZ80
®
CPU
User Manual
UM007715-0415 Memory Modes
7
When MBASE is set to
00h
, the CPU operates like a classic Z80 with 
16-bit addressing from
0000h
to
00FFh
. When MBASE is set to a nonzero value, the 16-
bit Z80-style addresses are offset to a new page, as defined by MBASE.
By altering MBASE, multiple Z80 tasks can possess their own individual Z80 partitions.
The MBASE register can only be changed while in ADL mode, thereby preventing acci-
dental page switching when operating in Z80 MEMORY mode. The MBASE address reg-
ister does not affect the length of the CPU register. In Z80 mode, the CPU registers remain
16 bits, independent of the value of MBASE. For more information on the CPU registers
in Z80 mode, see the eZ80 ® CPU Registers in Z80 Mode on page 11.
ADL MEMORY Mode
Setting the ADL bit to 1 selects ADL mode. This memory mode is referred to as ADL
MEMORY mode or ADL mode. In ADL mode, the user application can take advantage of
the CPU’s 16 MB linear addressing space, 24-bit CPU registers, and enhanced instruction
Figure 4. Z80 MEMORY Mode Map
MBASE
Memory
Location
00h
01h
02h
8Fh
FEh
FFh
000000h
010000h
020000h
8F0000h
FE0000h
FF0000h
00FFFFh
01FFFFh
02FFFFh
8FFFFFh
FEFFFFh
FFFFFFh
Z80 Mode˜Page 0
64 KB
Z80 Mode˜Page 1
64 KB
Z80 Mode˜Page 2
64 KB
Z80 Mode˜Page 127
64 KB
Z80 Mode˜Page 254
64 KB
Z80 Mode˜Page 255
64 KB