Adc a, (ix/y+d), Operation, Description – Zilog EZ80F916 User Manual
Page 90: Condition bits affected attributes
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
81
ADC A, (IX/Y+d)
ADD with Carry
Operation
A A+(IX/Y+d)+C
Description
(IX/Y+d) is an 8-bit value stored in the memory location specified by the Index Register,
IX or IY, offset by the two’s-complement displacement d. This 8-bit value and the Carry
Flag (C) are added to the contents of the accumulator, A. The result is stored in the accu-
mulator.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Set if carry from bit 3; reset otherwise.
P/V
Set if overflow; reset otherwise.
N
Reset.
C
Set if carry from bit 7; reset otherwise.
Mnemonic
Operand
ADL Mode
Cycle
Opcode (hex)
ADC
A,(IX+d)
X
4
DD, 8E, dd
ADC.S
A,(IX+d)
1
5
52, DD, 8E, dd
ADC
.L
A,(IX+d)
0
5
49, DD, 8E, dd
ADC
A,(IY+d)
X
4
FD, 8E, dd
ADC.S
A,(IY+d)
1
5
52, FD, 8E, dd
ADC
.L
A,(IY+d)
0
5
49, FD, 8E, dd