Zilog EZ80F916 - Manual (Page 302)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
293
Condition Bits Affected
None.
Attributes
0 . L The starting Program Counter is {MBASE, PC[15:0]}.
Pop a byte from SPL into ADL to set memory mode
(03h = ADL, 02h = Z80).
if ADL mode {
Pop the upper byte of the return address from SPL into
PC[23:16].
Pop 2 LS bytes of the return address from {MBASE, SPS}
into PC[15:0]. 
The ending Program Counter is PC[23:0]
}
else Z80 mode {
Pop a 2-byte return address from {MBASE,SPS} into
PC[15:0].
The ending Program Counter is {MBASE, PC[15:0]}.
}
1 .L The starting Program Counter is PC[23:0]. Pop a byte
from SPL into ADL to set memory mode (03h = ADL,
02h
= Z80).
if ADL mode {
Pop 3-byte return address from SPL into PC[23:0].
The ending Program Counter is PC[23:0]
}
else Z80 mode {
Pop a 2-byte return address from SPL into PC[15:0].
The ending Program Counter is {MBASE, PC[15:0]}.
}
Mnemonic Operand ADL Mode Cycle Opcode (hex)
RET
— 0/1 5/6
C9
RET.L
— 0 6
49, C9
RET.L
— 1 7
5B, C9
Table 83. RET Instruction Detail (Continued)
ADL Suffix Operation