Zilog EZ80F916 - Manual (Page 277)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
268
OUT (BC), r—also OUT (C), r for Z80 compatibility
Output to I/O
Operation
({UU, BC[15:0]})  r
Description
The r operand is any of the A, B, C, D, E, H, and L registers. The CPU outputs the con-
tents of this byte of the specified register to the I/O address {UU, BC[15:0]}. The upper
byte of the address bus, ADDR[23:16] is undefined for I/O addresses.
Condition Bits Affected
None.
Attributes
jj
identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes
indicated in Table 76 .
Mnemonic Operand ADL Mode Cycle Opcode (hex)
OUT
(BC),r X 3
ED, jj
Table 76. Register and jj Opcodes for OUT (BC), r and OUT (C), r
Instructions (hex)
Register jj
A
79
B
41
C
49
D
51
E
59
H
61
L
69