Lea ix/y, ix+d, Operation, Description – Zilog EZ80F916 User Manual
Page 251: Condition bits affected, Attributes
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
242
LEA IX/Y, IX+d
Load Effective Address
Operation
IX/Y
IX+d
Description
The CPU adds the contents of the IX register to the signed displacement d and writes the
sum to the specified multibyte Index Register, IX or IY.
Condition Bits Affected
None.
Attributes
Mnemonic Operand
ADL Mode Cycle
Opcode (hex)
LEA
IX,IX+d
X
3
ED, 32, dd
LEA.S
IX,IX+d
1
4
52, ED, 32, dd
LEA.L
IX,IX+d
0
4
49, ED, 32, dd
LEA
IY,IX+d
X
3
ED, 55, dd
LEA.S
IY,IX+d
1
4
52, ED, 55, dd
LEA.L
IY,IX+d
0
4
49, ED, 55, dd
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