Zilog EZ80F916 - Manual (Page 82)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
73
PUSH
ss
if ADL mode {
(SPL)  ss
SPL  SPL – 3
} 
else Z80 mode{
SPS  ss
SPS  SPS – 2
}
AF
F5
— — — — — —
IX/Y DD/FD E5
rr C5-E5
RES
b,s
s
[b]  0
(HL)
CB 86-BE
— — — — — —
(IX/Y+d)
DD/FD CB dd
86-BE
r CB 80-BF
RET

PC  (SP)
C9
— — — — — —
RET
cc
if cc {PC  (SP)}
C0-F8
— — — — — —
RETI
PC  (SP)
ED 4D
— — — — — —
RETN
Same as RET, with addition of
IEF1  IEF2
ED 45
— — — — — —
RL s
(HL)
CB 16
* * 0 P 0 *
(IX/Y+d)
DD/FD CB dd
16
r CB 10-17
RLA
A
17
— — 0 — 0 *
Table 37. Instruction Summary (Continued)
Instruction and Operation
Address Mode
Opcode(s)
(Hex)
Flags Affected
Dest Source S Z H P/V N C
Note: *This flag value is a function of the result of the affected operation.
— = No Change.
0 = Set to 0.
1 = Set to 1.
V = Set to 1 if overflow occurs.
X = Undetermined.
P = Set to the parity of the result (0 if odd parity, 1 if even parity).
IEF2 = The value of Interrupt Enable Flag 2.