Zilog EZ80F916 - Manual (Page 128)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
119
CP A, ir
Compare with Accumulator
Operation
A – ir
Description
The ir operand is any of the 8-bit registers IXH, IXL, IYH, or IYL. The ir operand is com-
pared with (subtracted from) the contents of the accumulator, A. The execution of this
instruction does not affect the contents of the accumulator or the ir operand.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if A = ir; reset otherwise.
H
Set if borrow from bit 4; reset otherwise.
P/V
Set if overflow: reset otherwise.
N
Set.
C
Set if borrow; reset otherwise.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
CP
A,IXH X 2
DD, BC
CP
A,IXL X 2
DD, BD
CP
A,IYH X 2
FD, BC
CP
A,IYL X 2
FD, BD