Zilog EZ80F916 - Manual (Page 367)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
358
SUB A, ir
Subtract without Carry
Operation
A  A – ir
Description
The ir operand is any of the 8-bit registers IXH, IXL, IYH, or IYL. The ir operand is sub-
tracted from the contents of the accumulator, A. The result is written to the accumulator.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Set if borrow from bit 4; reset otherwise.
P/V
Set if overflow; reset otherwise.
N
Set.
C
Set if borrow; reset otherwise.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
SUB
A,IXH X 2
DD, 94
SUB
A,IXL X 2
DD, 95
SUB
A,IYH X 2
FD, 94
SUB
A,IYL X 2
FD, 95