Rr (ix/y+d), Operation description, Condition bits affected attributes – Zilog EZ80F916 User Manual
Page 324
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
315
RR (IX/Y+d)
Rotate Right
Operation
Description
The (IX/Y+d) operand is an 8-bit value at the memory location specified by the contents
of the Index Register, IX or IY, added to the two’s-complement displacement d. The CPU
manipulates the contents of this memory location, (IX/Y+d), by rotating them right one
bit position. The CPU next copies the contents of bit 0 into the Carry Flag and copies the
previous contents of the Carry Flag into bit 7 of the memory location, (IX/Y+d).
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Reset.
P/V
Set if parity is even; reset otherwise.
N
Reset.
C
Data from bit 0 of the source.
Mnemonic Operand
ADL Mode Cycle
Opcode (hex)
RR
(IX+d)
X
7
DD, CB, dd, 1E
RR.S
(IX+d)
1
8
52, DD, CB, dd, 1E
RR.L
(IX+d)
0
8
49, DD, CB, dd, 1E
RR
(IY+d)
X
7
FD, CB, dd, 1E
RR.S
(IY+d)
1
8
52, FD, CB, dd, 1E
RR.L
(IY+d)
0
8
49, FD, CB, dd, 1E
C
7
0
(IX/Y+d)