Ld sp, (mmn), Operation, Description – Zilog EZ80F916 User Manual
Page 246: Condition bits affected, Attributes

eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
237
LD SP, (Mmn)
Load Stack Pointer
Operation
SP
(Mmn)
Description
The 16- or 24-bit operand (Mmn) specifies a location in memory. The 16- or 24-bit value
stored at this memory location is written to the multibyte Stack Pointer register (SP). In
ADL mode, or when the .L suffix is employed, Stack Pointer Long (SPL) is the destina-
tion. In Z80 mode, or when the .S suffix is employed, Stack Pointer Short (SPS) is the des-
tination.
Condition Bits Affected
None.
Attributes
Zilog recommends against using the .SIL and .LIS suffixes with this instruction. The .SIL
instruction fetches a 24-bit value, Mmn. However, this instruction ignores the upper byte
and uses address {MBASE, mm, nn} instead. The .LIS instruction fetches a 16-bit value,
mn. However, the .LIS instruction does not use the MBASE value. Instead, it uses address
{00, mm, nn}.
Mnemonic Operand
ADL
Mode
Cycle
Opcode (hex)
LD
SP
,(mn)
0
5
ED, 7B, nn, mm
LD
SP
,(Mmn) 1
6
ED, 7B, nn, mm, MM
LD.LIL
SP
,(Mmn) 0
7
5B, ED, 7B, nn, mm, MM
LD.SIS
SP
,(mn)
1
6
40, ED, 7B, nn, mm
Note: