Zilog EZ80F916 - Manual (Page 394)

eZ80
®
CPU
User Manual
UM007715-0415 Glossary
385
CPL.
Complement Accumulator; a logical instruction.
CTR.
Counter.
CTRL.
Control.
D.
Decimal-Adjust Flag.
D/A.
Digital-to-Analog—the conversion of a digital signal to an analog signal. See DAC.
DAA.
Decimal Adjust Accumulator; an arithmetic instruction.
DAC.
Digital-to-Analog Converter. A circuit that converts a digital bit stream (binary numbers) into
voltage signals at specific levels. See D/A.
DART.
Dual-Channel Asynchronous Receiver/Transmitter—an SIO that supports asynchronous data
communications only.
data bus.
An I/O bus used by the eZ80
®
CPU for passing data to and from internal and external memory.
DCE.
Data Circuit-terminating Equipment—connects data terminal equipment (DTE) to a data circuit. A
modem is an example of a DCE.
DEC.
Decrement; an arithmetic instruction.
DECW.
Decrement Word.
DI.
Disable Interrupt; a processor control instruction.
digital phase-locked loop.
A phase-locked loop in which the reference signal, the controlled signal, or
the controlling signal, or any combination of these, is in digital form.
DI.
Disable interrupt.
DJNZ.
Decrement and Jump if Nonzero; a program control instruction.
DMA.
Direct Memory Access—a device that is dedicated to the task of controlling high-speed block
transfers of data independently of the CPU.
downconverter.
A device that translates frequencies from higher to lower frequencies.
DPLL.
Digital Phase Locked Loop.
DR.
Data Read.
DRAM.
Dynamic Random Access Memory—a computer memory that requires a refresh signal to be sent
to it periodically. Most computers use DRAM chips for memory. Contrast to static RAM (SRAM).
DREQ.
Data Request. DMA Request.
DSR.
Data Set Ready.
DSR signal.
Data Set Ready signal.
DST.
Destination.
DTE.
Data Terminal Equipment. Equipment that sends and receives data.
DTR.
Data Transfer Rate.
EC.
Enable Clock.
EPROM.
Erasable Programmable Read-Only Memory.
EI.
Enable Interrupt; a processor control instruction (also see IE).
EPM.
EPROM Program Mode.