Zilog EZ80F916 - Manual (Page 152)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
143
EX AF, AF’
Exchange AF and AF’
Operation
A  A’
F  F’
Description
The CPU exchanges the contents of the accumulator, A, and the Flag register, F, with the
contents of the alternate accumulator, A’, and alternate Flag register, F’, respectively.
Condition Bits Affected
All condition bits are replaced with the values from the alternate Flag register, F’.
Attributes
Mnemonic Operand ADL Mode Cycle Opcode (hex)
EX
AF,AF’ X 1
08