Zilog EZ80F916 - Manual (Page 125)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
116
Condition Bits Affected
None.
Attributes
1
.IS
The starting Program Counter is PC[23:0]. Push the 2
LS bytes of the return address, PC[15:0], onto the
{MBASE, SPS} stack. Push the MS byte of the return
address, PC[23:16], onto the SPL stack. Push a 03h
byte onto the SPL stack, indicating a call from ADL
mode (because ADL = 1). Reset ADL mode bit to 0.
Load a 2-byte logical address {mm, nn} from the
instruction into PC[15:0]. The ending Program Counter
is {MBASE, PC[15:0]} = {MBASE, mm, nn}.
0
.IL
The starting Program Counter is {MBASE, PC[15:0]}.
Push the 2-byte logical return address, PC[15:0], onto
the SPL stack. Push a 02h byte onto the SPL stack,
indicating a call from Z80 mode (because ADL = 0). Set
the ADL mode bit to 1. Load the 3-byte address {MM,
mm, nn} from the instruction into PC[23:0]. The ending
Program Counter is PC[23:0] = {MM, mm, nn}.
1
.IL
The starting Program Counter is PC[23:0]} Push the 3-
byte return address, PC[23:0], onto the SPL stack. Push
a 03h byte onto the SPL stack, indicating a call from
ADL mode (because ADL = 1 ). The ADL mode bit
remains set to 1. Load a 3-byte address {MM, mm, nn}
from the instruction into PC[23:0]. The ending Program
Counter is PC[23:0] = {MM, mm, nn}.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
CALL mn
0 5
CD, nn, mm
CALL Mmn
1 7
CD, nn, mm, MM
CALL.IS mn
0 7
40, CD, nn, mm
CALL.IS mn
1 8
49, CD, nn, mm
CALL.IL Mmn
0 8
52, CD, nn, mm, MM
CALL.IL Mmn
1 9
5B, CD, nn, mm, MM
Table 49. Detail of the CALL Mmn Instruction