Dec (ix/y+d), Operation, Description – Zilog EZ80F916 User Manual
Page 144: Condition bits affected attributes
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
135
DEC (IX/Y+d)
Decrement
Operation
(IX/Y+d) (IX/Y+d)–1
Description:
The (IX/Y+d) operand is the 8-bit value stored in the memory location specified by the
contents of the Index Register, IX or IY, added to the two’s-complement displacement d.
This 8-bit value contained in the specified register is decremented by 1.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Set is borrowed from bit 4; reset otherwise.
P/V
Set if operand was 80h before operation; reset otherwise.
N
Set.
C
Not affected.
Mnemonic
Operand
ADL Mode
Cycle
Opcode (hex)
DEC
(IX+d)
X
6
DD, 35, dd
DEC.S
(IX+d)
1
7
52, DD, 35, dd
DEC
.L
(IX+d)
0
7
49, DD, 35, dd
DEC
(IY+d)
X
6
FD, 35, dd
DEC.S
(IY+d)
1
7
52, FD, 35, dd
DEC
.L
(IY+d)
0
7
49, FD, 35, dd