Pop af, Operation, Description – Zilog EZ80F916 User Manual
Page 286: Condition bits affected, Attributes

eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
277
POP AF
Pop Stack
Operation
if ADL mode {
F (SPL)
A (SPL+1)
Discard (SPL+2)
SPL SPL+3
}
else Z80 mode {
F (SPS)
A (SPS+1)
SPS SPS+2
}
Description
In ADL mode, or when the .L suffix is employed, 3 bytes are popped off the stack begin-
ning at the memory location specified by SPL. The first byte popped off the stack from
SPL is written to the Flags Register, F. The second byte popped off the stack from
(SPL+1) is written to the accumulator, A. The third byte popped off the stack from
(SPL+2) is discarded. The SPL increments by 3.
In Z80 mode, or when the .S suffix is employed, 2 bytes are popped off the stack begin-
ning at the memory location specified by SPS. The first byte popped off the stack from
SPS is written to the Flags Register, F. The second byte popped off the stack from (SPS+1)
is written to the accumulator, A. The SPS increments by 2.
Condition Bits Affected
The condition bits are written with the Flags register (F) value popped from the stack.
Attributes
Mnemonic Operand
ADL Mode Cycle
Opcode (hex)
POP
AF
0/1
3/4
F1
POP.S
AF
1
4
52, F1
POP.L
AF
0
5
49, F1