Zilog EZ80F916 - Manual (Page 48)

eZ80
®
CPU
User Manual
UM007715-0415 Interrupts
39
Table 22. Interrupt Mode 0 Operation
Current
Memory Mode
ADL
Mode
Bit MADL
Control
Bit
Operation (if RST n or CALL Mmn is placed on the
data bus)
Z80 mode 0 0 Read the RST n of CALL mn instruction placed on the
data bus, D[7:0], by the interrupting peripheral.
IEF1
 0
IEF2
 0
The starting program counter is {MBASE, PC[15:0]}.
Push the 2-byte return address, PC[15:0], onto the
{MBASE,SPS} stack. The ADL mode bit remains
cleared to 0. Write {00h, nn} or {mm, nn} to PC[15:0].
The ending program counter is {MBASE,
PC[15:0]} = {MBASE, 00h, nn} or {MBASE, mm, nn}.
The interrupt service routine must end with RETI.
ADL mode 1 0 Read RST n or CALL Mmn instruction placed on the
data bus, D[7:0], by the interrupting peripheral.
IEF1
 0
IEF2
 0
The starting program counter is PC[23:0]. Push the 3-
byte return address, PC[23:0], onto the SPL stack. The
ADL mode bit remains set to 1. Write {0000h, nn} or
{MM, mm, nn} to PC[23:0]. The ending program
counter is PC[23:0] = {0000h, nn} or {MM, mm, nn}.
The interrupt service routine must end with RETI.
Z80 mode 0 1 Read RST n or CALL Mmn instruction placed on the
data bus, D[7:0], by interrupting peripheral.
IEF1
 0
IEF2
 0
The starting program counter is {MBASE, PC[15:0]}.
Push the 2-byte return address, PC[15:0], onto the
SPL stack. Push a 02h byte onto the SPL stack,
indicating interrupting from Z80 mode (because
ADL = 0). Set the ADL mode bit to 1. Write {0000h, nn}
or {MM, mm, nn} to PC[23:0]. The ending program
counter is PC[23:0] = {0000h, nn} or {MM, mm, nn}.
The interrupt service routine must end with RETI.L