Tstio n, Operation, Description – Zilog EZ80F916 User Manual
Page 376: Condition bits affected attributes

eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
367
TSTIO n
Test I/O Byte
Operation
{0000h, C} AND n
Description
The CPU places the contents of the C register onto the lower byte of the address bus,
ADDR[7:0], while it forces the two upper bytes of the address bus, ADDR[23:0], to 0s.
The data at this I/O address {
0000h
, C}, is bitwise ANDed with the 8-bit immediate value
n
. The appropriate flags are set to 1, depending on the result of the AND logical operation.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Set.
P/V
Set if parity is even; reset otherwise.
N
Reset.
C
Reset.
Mnemonic Operand
ADL Mode Cycle
Opcode (hex)
TSTIO
n
X
4
ED, 74, nn
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