Or a, ir, Operation, Description – Zilog EZ80F916 User Manual
Page 260: Condition bits affected attributes

eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
251
OR A, ir
Logical OR
Operation
A A OR ir
Description
The rr operand is any of the 8-bit registers IXH, IXL, IYH, or IYL. The rr operand is log-
ically ORed to the contents of the accumulator, A. The result is written to the accumulator.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Reset.
P/V
Set if parity is even; reset otherwise.
N
Reset.
C
Reset.
Mnemonic Operand
ADL Mode Cycle
Opcode (hex)
OR
A, IXH
X
2
DD B4
OR
A, IXL
X
2
DD B5
OR
A, IYH
X
2
FD B4
OR
A, IYL
X
2
FD B5
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