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Zilog EZ80F916 User Manual

Page 26

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eZ80

®

CPU

User Manual

UM007715-0415

Registers and Bit Flags

17

Half-Carry Flag (H)
The Half-Carry flag (H) is set or reset, depending on the carry and borrow status between

bits 3 and 4 of an 8-bit arithmetic operation. This flag is used by the decimal adjust accu-

mulator instruction (DAA) to correct the result of a packed BCD addition or subtraction.

The H flag is set to 1 or reset to 0, as indicated in

Table 9

.

Zero Flag (Z)
The Zero flag (Z) is set to 1 if the result generated by the execution of 

certain instructions is 0. For 8-bit arithmetic and logical operations, the Z flag is set to 1 if

the resulting byte in the accumulator is 0. If the byte is not 0, the Z flag is reset to 0.
For compare instructions, the Z flag is set to 1 if the value in the 

accumulator is the same as the data it is being compared against. When testing a bit in a

register or memory location, the Z flag contains the 

complemented state of the indicated bit (see the BIT b, r instruction.
When inputting or outputting a byte between a memory location and an I/O device (for

example, INI, IND, OUTI and OUTD), the B register is decremented. If the result of this

decrement is 0 (that is, B–1 = 0), then the Z flag is set to 1. Otherwise, the Z flag is reset

(cleared to 0). Also, for byte inputs from I/O devices using IN r,(C), the Z flag is set to 1 to

indicate a zero-byte input.

Sign Flag (S)
The Sign flag stores the state of the most significant bit of the 

accumulator (bit 7). When the CPU performs arithmetic operations on signed numbers,

binary two’s-complement notation is used to represent and process numerical information.

A positive number is identified by a 0 in bit 7. A negative number is identified by a 1.
The binary equivalent of the magnitude of a positive number is stored in bits 0–6 for a

total range of 0–127. A negative number is represented by the two’s-complement of the

equivalent positive number. The total range for negative numbers is –1 to –128.
When inputting a byte from an I/O device to a register, IN r,(C), the S flag indicates either

positive (S = 0) or negative (S = 1) data.

Table 9. H Flag Settings

H

ADD

SUBTRACT

1 There is a carry from bit 3 to bit 4 There is a borrow from bit 4.
0 There is no carry from bit 3 to bit

4

There is no borrow from bit 4.

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