Ld (ix/y+d), ix/y, Operation, Description – Zilog EZ80F916 User Manual
Page 219: Condition bits affected, Attributes
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
210
LD (IX/Y+d), IX/Y
Load Indirect with Offset
Operation
(IX/Y+d) IX/Y
Description
The CPU writes the contents of the Index Register, IX or IY, to the memory location spec-
ified by the contents of the multibyte Index Register, IX or IY, offset by the two’s-comple-
ment displacement d.
Condition Bits Affected
None.
Attributes
Mnemonic
Operand
ADL Mode
Cycle
Opcode (hex)
LD
(IX+d),IX
0/1
5/6
DD, 3F, dd
LD.S
(IX+d),IX
1
6
52, DD, 3F, dd
LD.L
(IX+d),IX
0
7
49, DD, 3F, dd
LD
(IX+d),IY
0/1
5/6
DD, 3E, dd
LD.S
(IX+d),IY
1
6
52, DD, 3E, dd
LD.L
(IX+d),IY
0
7
49, DD, 3E, dd
LD
(IY+d),IX
0/1
5/6
FD, 3E, dd
LD.S
(IY+d),IX
1
6
52, FD, 3E, dd
LD.L
(IY+d),IX
0
7
49, FD, 3E, dd
LD
(IY+d),IY
0/1
5/6
FD, 3F, dd
LD.S
(IY+d),IY
1
6
52, FD, 3F, dd
LD.L
(IY+d),IY
0
7
49, FD, 3F, dd