Maxim Integrated MAXQ7667 - Manual (Page 91)

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MAXQ7667 User’s Guide
The ports (P0 and P1) can be used to support applications that require open-drain/open-source functionality. This can be achieved by
using the PO and PD register of the port.
• Three-state the port pin needed to be open drain by setting the corresponding PDn.x bit to 0.
• Clear the corresponding POn.x bit to 0.
• Use the corresponding PDn.x bit to drive the port pin function, instead of the POn.x register.
Note that the internal pullup/pulldown has a relatively high impedance (typically ˜150kΩ), so a particular system may require a stronger
(external) pullup/pulldown to meet the system level needs.
5.3.2 Port P0 and P1 External Interrupts
Each port pin can function as an external interrupt with individual enable, flag, and active edge selection bits.
• External interrupt enable register (EIE0 and EIE1) bits determine if the external interrupt functionality at each pin is enabled or not.
• External interrupt edge select register (EIES0 and EIES1) bits determine if the external interrupt is generated on rising or falling
edge of the interrupt pin input.
• External interrupt flag register (EIF0 and EIF1) bits indicate if a valid rising or falling edge has been detected on the interrupt pin
input. An interrupt is generated only if the external interrupt functionality is enabled for the pin. Also, global interrupt mask bits
IM0 (in the IMR register) and IGE (in the IC register) must be enabled.
Note: The detection of a valid interrupt edge on any of the external interrupt pins can act as a switchback-trigger source, causing the
microcontroller to switch back from stop mode to the standard system clock frequency.
5.3.3 Port Pin Special and Alternate Functions
All the MAXQ7667’s port pins are multiplexed with special functions as listed in Table 5-4. All these special functions are disabled by
default with the exception of the JTAG interface pins, which are enabled by default following any reset. The behavior of these functions
breaks down into two categories:
• Special functions override the data direction register (PD0 and PD1) and port output register (PO1 and PO2) settings for the port
pin when they are enabled. Once the special function takes control, normal control of the port pin is lost until the special function
is disabled. Examples of special functions include timer 0 and timer 1 output.
• Alternate functions operate in parallel with the data direction register (PD0 and PD1) and port output register (PO1 and PO2) set-
tings for the port pin, and generally consist of input-only functions such as external interrupts. When an alternate function is
enabled for a port pin, the port pin’s output state is still controlled in the usual manner.
Table 5-4. Port P0 Pin Special and Alternate Functions
PORT P0
PIN
FUNCTION
TYPE
FUNCTION ENABLED WHEN MULTIPLEXING/PRIORITIZATION
Special
URX—As URX this pin is the
receive data input for the UART,
which can (optionally) be
connected to RXD or a LIN
transceiver.
Always
P0.0/URX
Alternate External Interrupt 0, Input (EIE0.0) EX0 = 1
This port pin defaults to a weak pullup input
after a reset. This pin can be tied to
P0.1/UTX for UART half-duplex operation or
connected to a LIN transceiver.
Special
UTX—As UTX this pin is the
transmit data output of the UART,
which can (optionally) be
connected to TXD or a LIN
transceiver.
SBUF loaded with data
P0.1/UTX
Alternate External Interrupt 1, Input (EIE0.1) EX1 = 1
This port pin defaults to a weak pullup input
after a reset. When the UART is transmitting,
this pin is actively driven with the transmit
data; the pin returns to the configured
pullup/down state when the UART becomes
idle.