2 breakpoint registers, 1 breakpoint register, 2 breakpoint registers -12 – Maxim Integrated MAXQ7667 User Manual
Page 210: 1 breakpoint registers 0 to 3 (bp0 to bp3) -12, Maxq7667 user’s guide
_________________________________________________________________________________________________________
12-12
MAXQ7667 User’s Guide
12.3.2 Breakpoint Registers
The MAXQ7667 incorporates six host-configurable breakpoint registers (BP0–BP5) for establishing different types of breakpoint mech-
anisms. The first four breakpoint registers (BP0–BP3) are 16-bit registers that are configurable as program memory address break-
points. When enabled, the debug engine forces a break when a match between the breakpoint register and the program memory exe-
cution address occurs. The final two 16-bit breakpoint registers (BP4 and BP5) are configurable in one of two ways. They can be con-
figured as data memory address breakpoints or can be configured to support register-access breakpoints. In either case, if break-
points are enabled and the defined breakpoint match occurs, the debug engine generates a break condition. The six breakpoint reg-
isters are detailed in the following sections.
12.3.2.1 Breakpoint Registers 0 to 3 (BP0 to BP3)
The BP0 to BP3 registers are accessible only via background mode read/write debug commands. These four registers serve as pro-
gram memory address breakpoints. When the DME bit is set, the debug engine monitors the program address bus activity while the
CPU is executing the user program. A break occurs when the address pattern matches with the contents of these registers, allowing
the debug engine to take control of the CPU and enter debug mode.
These registers default to FFFFh after a power-on reset or test-logic-reset TAP state.
Register Description:
Breakpoint Register x (where x = 0, 1, 2, 3)
Register Name:
BPx
Bits 15 to 0: Breakpoint Register x Bits 15:0 (BPx[15:0])
Bit #
15
14
13
12
11
10
9
8
Name
BPx15
BPx14
BPx13
BPx12
BPx11
BPx10
BPx9
BPx8
Reset
1
1
1
1
1
1
1
1
Access
s
s
s
s
s
s
s
s
Bit #
7
6
5
4
3
2
1
0
Name
BPx7
BPx6
BPx5
BPx4
BPx3
BPx2
BPx1
BPx0
Reset
1
1
1
1
1
1
1
1
Access
s
s
s
s
s
s
s
s
s = special (accessible only by background mode read/write commands)