Maxim Integrated MAXQ7667 - Manual (Page 327)

19-13 _________________________________________________________________________________________________________
MAXQ7667 User’s Guide
MOVE dst, src Move Data
Description: Moves data from a specified source (src) to a specified destination (dst). A list of defined source, destination spec-
ifiers is given in the table below. Also, since src can be either 8-bit (byte) or 16-bit (word) data, the rules governing
data transfer are also explained below in the encoding section.
Status Flags: S, Z (if dst is Acc or AP or APC)
C, E (if dst is PSF)
Operation: dst ← src
Encoding: 15 0
Table 19-2. Source Specifier Codes
fddd dddd ssss ssss
src
src BIT ENCODING
(f ssssssss)
WIDTH
(16 or 8)
DESCRIPTION
#k 0 kkkk kkkk 8 kkkkkkkk = Immediate (Literal) Data
MN[n] 1 nnnn 0NNN 8/16
nnnn Selects One of First 16 Registers in Module NNN;
where NNN = 0 to 5. Access to Second 16 Using PFX[n].
AP 1 0000 1000 8 Accumulator Pointer
APC 1 0001 1000 8 Accumulator Pointer Control
PSF 1 0100 1000 8 Processor Status Flag Register
IC 1 0101 1000 8 Interrupt and Control Register
IMR 1 0110 1000 8 Interrupt Mask Register
SC 1 1000 1000 8 System Control Register
IIR 1 1011 1000 8 Interrupt Identification Register
CKCN 1 1110 1000 8 Clock Control Register
WDCN 1 1111 1000 8 Watchdog Control Register
A[n] 1 nnnn 1001 8/16 nnnn Selects One of 16 Accumulators
Acc 1 0000 1010 8/16 Active Accumulator = A[AP]. Update AP per APC
A[AP] 1 0001 1010 8/16 Active Accumulator = A[AP]. No change to AP
IP 1 0000 1100 16 Instruction Pointer
@SP-- 1 0000 1101 16 16-Bit Word @SP, Post-Decrement SP
SP 1 0001 1101 16 Stack Pointer
IV 1 0010 1101 16 Interrupt Vector
LC[n] 1 011n 1101 16 n Selects 1 of 2 Loop Counter Registers
@SPI-- 1 1000 1101 16 16-bit word @SP, Post-Decrement SP, INS = 0
@BP[OFFS] 1 0000 1110 8/16 Data Memory @BP[OFFS]
@BP[OFFS++] 1 0001 1110 8/16 Data memory @BP[OFFS]; Post-Increment OFFS
@BP[OFFS--] 1 0010 1110 8/16 Data Memory @BP[OFFS]; Post-Decrement OFFS
OFFS 1 0011 1110 8 Frame Pointer Offset from Base Pointer (BP)
DPC 1 0100 1110 16 Data Pointer Control Register
GR 1 0101 1110 16 General Register
GRL 1 0110 1110 8 Low Byte of GR Register
BP 1 0111 1110 16 Frame Pointer Base Pointer (BP)
GRS 1 1000 1110 16 Byte-Swapped GR Register
GRH 1 1001 1110 8 High Byte of GR Register
GRXL 1 1010 1110 16 Sign Extended Low Byte of GR Register
FP 1 1011 1110 16 Frame Pointer (BP[OFFS])
@DP[n] 1 0n00 1111 8/16 Data Memory @DP[n]
@DP[n]++ 1 0n01 1111 8/16 Data Memory @DP[n], Post-Increment DP[n]
@DP[n]-- 1 0n10 1111 8/16 Data Memory @DP[n], Post-Decrement DP[n]
DP[n] 1 0n11 1111 16 n Selects 1 of 2 Data Pointers