Maxim Integrated MAXQ7667 - Manual (Page 272)

16.2.2 Analog Status Register (ASR)
Register Description: Analog Status Register
Register Name: ASR
Register Address: Module 05h, Index 08h
Bit 15: DVDDIO Brownout Comparator Output Level (VIOLVL). This bit always reflects the DVDDIO brownout comparator’s current
state when read.
Bit 14: DVDD Brownout Comparator Output Level (DVLVL). This bit always reflects the DVDD brownout comparator’s current state
when read.
Bit 13: AVDD Brownout Comparator Output Level (AVLVL). This bit always reflects the AVDD brownout comparator’s current state
when read.
Bit 12: Echo Envelope Comparator Output Level (CMPLVL). See Section 17 for details on this bit.
Bits 11 to 9: Reserved. Read returns 0.
Bit 8: Crystal Oscillator Ready (XTRDY). See Section 15 for details on this bit.
Bit 7: Crystal Oscillator Failure Interrupt Flag (XTI). See Section 15 for details on this bit.
Bit 6: DVDDIO Brownout Interrupt Flag (VIBI). Set to 1 when DVDDIO brownout is detected.
Bit 5: DVDD Brownout Interrupt Flag (VDBI). Set to 1 when DVDD brownout is detected.
Bit 4: AVDD Brownout Interrupt Flag (VABI). Set to 1 when AVDD brownout is detected.
Bit 3: Echo Envelope Comparator Interrupt Flag (CMPI). See Section 17 for details on this bit.
Bit 2: Echo Envelope Lowpass Filter FIFO Full Interrupt Flag (LPFFL). See Section 17 for details on this bit.
Bit 1: Echo Envelope Lowpass Filter Output Data Ready Flag (LPFRDY). See Section 17 for details on this bit.
Bit 0: SAR ADC Data Ready Flag (SARRDY). See Section 14 for details on this bit.
__________________________________________________________________________________________________________ 16-6
MAXQ7667 User’s Guide
r = read
Note: ASR bits 3:0 are cleared to 0h on reset; bits 8:4 clear to 0h on power-on reset.
Bit # 15 14 13 12 11 10 9 8
Name VIOLVL DVLVL AVLVL CMPLVL — — — XTRDY
Reset 0 0 0 0 0 0 0 0
Access r r r r r r r r
Bit # 7 6 5 4 3 2 1 0
Name XTI VIBI VDBI VABI CMPI LPFFL LPFRDY SARRDY
Reset 0 0 0 0 0 0 0 0
Access r r r r r r r r