Maxim Integrated MAXQ7667 - Manual (Page 83)

___________________________________________________________________________________________________________ 5-8
MAXQ7667 User’s Guide
5.2.5 Port 0 Input Register (PI0)
Register Description: Port 0 Input Register
Register Name: PI0
Register Address: Module 00h, Index 08h
Bits 15 to 8: Reserved. Read returns 0, write ignored.
Bits 7 to 0: Port 0 Input Register Bits 7:0 (PI0[7:0]). Port 0 is an enhanced Type D I/O port. The PI0 register always reflects the logic
state of its pins when read.
5.2.6 Port 1 Input Register (PI1)
Register Description: Port 1 Input Register
Register Name: PI1
Register Address: Module 00h, Index 09h
Bits 15 to 8: Reserved. Read returns 0, write ignored.
Bits 7 to 0: Port 1 Input Register Bits 7:0 (PI1[7:0]). Port 1 is an enhanced Type D I/O port. The PI1 register always reflects the logic
state of its pins when read.
r = read, s = dependent on pin’s state
Note: The reset value for this register is dependent on the logical states of the pins.
Bit # 15 14 13 12 11 10 9 8
Name — — — — — — — —
Reset 0 0 0 0 0 0 0 0
Access r r r r r r r r
Bit # 7 6 5 4 3 2 1 0
Name PI07 PI06 PI05 PI04 PI03 PI02 PI01 PI00
Reset s s s s s s s s
Access r r r r r r r r
r = read, s = dependent on pin’s state
Note: The reset value for this register is dependent on the logical states of the pins.
Bit # 15 14 13 12 11 10 9 8
Name — — — — — — — —
Reset 0 0 0 0 0 0 0 0
Access r r r r r r r r
Bit # 7 6 5 4 3 2 1 0
Name PI17 PI16 PI15 PI14 PI13 PI12 PI11 PI10
Reset s s s s s s s s
Access r r r r r r r r