Maxim Integrated MAXQ7667 - Manual (Page 293)

17.3.6 Echo Envelope Comparator Control Register (CMPC)
Register Description: Echo Envelope Comparator Control Register
Register Name: CMPC
Register Address: Module 05h, Index 06h
Bit 15: Comparator Output Polarity (CMPP). Set CMPP = 0 to generate an interrupt on the rising edge of the CMPLVL signal. Set
CMPP = 1 to generate an interrupt on the falling edge of the CMPLVL signal.
Bits 14 to 0: Comparator Hysteresis (CMPH[14:0]). This register holds the user-adjustable comparator hysteresis. CMPLVL is reset
to 0 when LPFD is less than CMPT minus CMPH.
17.3.7 Echo Envelope Comparator Threshold Register (CMPT)
Register Description: Echo Envelope Comparator Threshold Register
Register Name: CMPT
Register Address: Module 05h, Index 07h
Bits 15 to 0: Comparator Threshold (CMPT[15:0]). This register holds the comparator threshold. CMPLVL is set to 1 when LPFD
exceeds CMPT.
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MAXQ7667 User’s Guide
r = read, w = write
Note: CMPC is cleared to 0000h on all forms of reset.
Bit # 15 14 13 12 11 10 9 8
Name CMPP CMPH14 CMPH13 CMPH12 CMPH11 CMPH10 CMPH9 CMPH8
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit # 7 6 5 4 3 2 1 0
Name CMPH7 CMPH6 CMPH5 CMPH4 CMPH3 CMPH2 CMPH1 CMPH0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
r = read, w = write
Note: CMPT is cleared to 0000h on all forms of reset.
Bit # 15 14 13 12 11 10 9 8
Name CMPT15 CMPT14 CMPT13 CMPT12 CMPT11 CMPT10 CMPT9 CMPT8
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit # 7 6 5 4 3 2 1 0
Name CMPT7 CMPT6 CMPT5 CMPT4 CMPT3 CMPT2 CMPT1 CMPT0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw