Maxim Integrated MAXQ7667 - Manual (Page 263)

15.3.2 External Oscillator and Crystal
The external clock source can be an external oscillator, a quartz crystal, or ceramic resonator. The core is designed to work at a max-
imum frequency of 16MHz.
If an external oscillator is used, it can be connected to XIN (pin 20), and XOUT (pin 21) can be left floating. However, a crystal should
be connected from XIN to XOUT. (Refer to the crystal manufacturer’s data sheet for more details.)
Typically, a switch to the external crystal/oscillator source is made after the crystal has been oscillating for long enough for it to “warm
up,” stabilizing its frequency. The crystal warmup timer provides this delay, which is a total of 65,536 crystal oscillations.
There are two ways to switch from the internal RC oscillator to the external crystal/oscillator source.
• Automatic Switch: This does not have precise control on the switch over time. Set XTRC (CKCN.7) and monitor RCMD (CKCN.5)
to detect when the switchover happens.
• Manual Switch: This method precisely controls the switch over time. Set XTE (OSCC.1) and poll XTRDY (ASR.8) (or use inter-
rupts) to wait until the crystal is ready. When the crystal is ready, set XTRC (CKCN.7); switchover to the external crystal/clock
happens immediately.
A switch from the external crystal/oscillator source to the internal RC oscillator requires setting XTRC = 0. The clock switches the clock
source to internal within a few RC oscillator cycles, so this switch happens immediately. Note that if the XTE bit is left set to 1, the exter-
nal crystal oscillator does not turn off, and therefore, the switch back to the crystal oscillator is immediate because the warmup time
for the crystal oscillator/clock is eliminated.
15.3.3 Internal System Clock Generation (SYSCLK)
The Internal system clock shown in Figure 15-1 as SYSCLK is derived from one of the selected system clock sources discussed in
Section 15.3.1 and Section 15.3.2. SYSCLK is the clock source to all the functional blocks (SPI, UART, timer/counter, etc.) within the
MAXQ7667.
The selected clock source can be manipulated as shown in Table 15-2 to produce the desired system clock.
Table 15-2. Divide Ratio of the System Clock from a Clock Source
15-11 _________________________________________________________________________________________________________
MAXQ7667 User’s Guide
PMME CD1 CD0 CLOCK-DIVIDE RATIO
0 0 0 Divide by 1 (default)
0 0 1 Divide by 2 (unavailable)
0 1 0 Divide by 4 (unavailable)
0 1 1 Divide by 8 (unavailable)
1 0 0 Divide by 256, Switchback to Divide by 1 (unavailable)
1 0 1 Divide by 256, Switchback to Divide by 2 (unavailable)
1 1 0 Divide by 256, Switchback to Divide by 4 (unavailable)
1 1 1 Divide by 256, Switchback to Divide by 8 (unavailable)