Maxim Integrated MAXQ7667 - Manual (Page 139)

8.3.6 Checksum Register (UART) (CHKSUM)
Register Description: Checksum Register
Register Name: CHKSUM
Register Address: Module 03h, Index 0Eh
Bits 15 to 8: Received Checksum (CHKSUM[15:8]). This register reflects the checksum that was received on the bus during the most
recent LIN frame. This register is updated by hardware whenever a complete frame is transmitted or received.
Bits 7 to 0: Calculated Checksum (CHKSUM[7:0]). This register reflects the checksum that was calculated by the peripheral for the
most recent LIN frame. This register is updated by hardware whenever a complete frame is transmitted or received. When the periph-
eral is receiving a frame, the checksum is calculated from the data received on the bus. When the peripheral is transmitting a frame,
the checksum is calculated from the data that is being transmitted.
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MAXQ7667 User’s Guide
r = read, w = write
Note: CHKSUM is cleared to 0000h on all forms of reset.
Bit # 15 14 13 12 11 10 9 8
Name CHKSUM15 CHKSUM14 CHKSUM13 CHKSUM12 CHKSUM11 CHKSUM10 CHKSUM9 CHKSUM8
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit # 7 6 5 4 3 2 1 0
Name CHKSUM7 CHKSUM6 CHKSUM5 CHKSUM4 CHKSUM3 CHKSUM2 CHKSUM1 CHKSUM0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw