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2 system control regist, 3 bootloader protocol, 2 system control register (sc) -4 – Maxim Integrated MAXQ7667 User Manual

Page 222: 3 bootloader protocol -4, Maxq7667 user’s guide, 2 system control register (sc)

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13.2.2 System Control Register (SC)

Register Description:

System Control Register

Register Name:

SC

Register Address:

Module 08h, Index 08h

Bit 7: Test Access (JTAG) Port Enable (TAP). This bit controls whether the TAP special function pins are enabled. The TAP defaults
to being enabled. See Section 11 for more information on this bit.

0 = JTAG/TAP functions are disabled and P0.0–P0.3 can be used as general-purpose I/O pins

1 = TAP special function pins P0.0–P0.3 are enabled to act as JTAG inputs and outputs

Bits 6 and 0: Reserved.

Bits 5 and 4: Code Data Access Bits 1 and 0 (CDA[1:0]). See Section 2 for more information on these bits.

Bit 3: Upper Program Access (UPA). Not used in the MAXQ7667.

Bit 2: ROM Operation Done (ROD). This bit is used to signify completion of a ROM operation sequence. The utility ROM signals that
it has completed a requested task by setting the ROD (ROM operation done) bit of the SC register to logic 1. The ROD bit is reset by

the debug engine when it recognizes the done condition. Setting the ROD bit to 1 when the SPE bit is also set causes the

system to reset.

Bit 1: Password Lock (PWL). This bit defaults to 1 on a power-on reset. When this bit is 1, it requires a 32-byte password to be
matched with the password in the program space before allowing access to the password protected in-circuit debug or bootstrap

loader ROM routines. Clearing this bit to 0 disables the password protection for these ROM routines.

The password is defined as the 16 words of physical program memory at addresses 0010h to 001Fh. A password value of all ones or

all zeros for all 16 words at addresses 0010h–001Fh will also unlock the password lock by setting the PWL bit to 0.

13.3 Bootloader Protocol

All bootloader commands begin with a single command byte. The high four bits of this command byte define the command family (from 0

to 15), while the low four bits define the specific command within that family. All commands (except for those in Family 0) follow this format:

After each command has completed, the loader outputs a “prompt” byte to indicate that it has finished the operation. The prompt byte

is the single character “>” (3Eh). Completion of exit loader command does not return a character.

Bootloader commands that fail for any reason set the bootloader status byte to an error code value describing the reason for the fail-

ure. See Table 13-2. This status byte can be read by means of the Get Status command (04h).

Bit #

7

6

5

4

3

2

1

0

Name

TAP

CDA1

CDA0

UPA

ROD

PWL

Reset

1

0

0

0

0

0

1*

0

Access

rw

r

rw

rw

rw

rw

rw

r

r = read, w = write

*This register defaults to 80h on all forms of reset except after power-on reset. After power-on resert, the PWL bit is also set and this register defaults to 82h.

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13-4

MAXQ7667 User’s Guide

BYTE 1

BYTE 2

BYTE 3

BYTE 4

(LENGTH) BYTES/WORDS

Command

Length

Param 1

Param 2

Data