Maxim Integrated MAXQ7667 - Manual (Page 19)

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MAXQ7667 User’s Guide
2.2.3.6 Pseudo-Von Neumann Memory Access
The pseudo-Von Neumann memory mapping is straightforward if there is no memory overlapping among the program, utility ROM, and
data memory segments. When accessing the program memory as data, the CDA bit can be used to select the program pages as need-
ed. Full data memory access to the physical program memory pages is based on the assumption that the maximum physical data mem-
ory is in the range of 16K x 16. The other restriction for accessing the pseudo-Von Neumann map is that when program execution is in a
particular memory segment, the same memory segment cannot be simultaneously accessed as data.
When executing from the lower 16K program space (P0):
• The physical data memory is available for accessing as a code segment with offset at xA000h if the UPA bit is 0.
• Load and Store operations addressed to physical data memory are executed as normal.
• The utility ROM can be read as data, starting at x8000h of the data space.
When executing from the utility ROM:
• The lower 16K program space (P0) functions as normal program memory.
• The physical data memory is available for accessing as a code segment with offset at xA000h.
• Load and Store operations addressed to physical data memory are executed as normal.
• The 16K program space, P0, can be accessed as data, either in byte mode or word mode, with offset at 8000h.
When executing from the data memory:
• Program flows freely between the lower 16K user code (P0) and the utility ROM segment.
• The utility ROM can be accessed as data with offset at x8000h.
• The 16K program space, P0, can be accessed as data, either in byte mode or word mode, with offset at 0000h.
2.2.3.7 Data Alignment
To support merged program and data memory operation while maintaining efficiency on memory space usage, the data memory must
be able to support both byte-wide and word-wide accessing. Data is aligned in data memory as word, but the effective data address is
resolved to bytes. This data alignment allows direct program fetching in its native word size while maintaining accessibility at the byte
level. It is important to realize that this accessibility requires strict word alignment. All executable words must align to an even address
in byte mode. Care must be taken when updating the code segment in the unified data memory space as misalignment of words will
likely result in loss of program execution control. Worst yet, this situation may not be detected if the watchdog timer is also disabled.
Data memory is organized as two byte-wide memory banks with common word address decode but two 8-bit data buses. The data
memory will always be read as a complete word, independent of operation, whether program fetch or data access. The program
decoder always uses the full 16-bit word, whereas the data access can utilize a word or an individual byte.
In byte mode, data pointer hardware reads out the word containing the selected byte using the effective data word address pointer
(the least significant bit of the byte data pointer is not initially used). Then, the least significant data pointer bit functions as the byte
select that is used to place the target byte to the data path. For write access, data pointer hardware addresses a particular word using
the effective data word address while the least significant bit selects the corresponding data bank for write, leaving the contents of the
another memory bank unaffected.