2 in-circuit debug periph, 1 in-circuit debug temp, 2 in-circuit debug peripheral registers -4 – Maxim Integrated MAXQ7667 User Manual
Page 202: 1 in-circuit debug temporary 0 register (icdt0) -4, Maxq7667 user’s guide, 2 in-circuit debug peripheral registers, 1 in-circuit debug temporary 0 register (icdt0)
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12-4
MAXQ7667 User’s Guide
The debug engine is supported by five functional registers:
•
ICDB: The ICDB register is an 8-bit data register that supports exchanging command/data between the host system and the in-
circuit debugger. The register functions as an 8-bit parallel buffer for the debug shift register in the TAP. The ICDB register is
mapped to the peripheral register space and is read/write accessible by the CPU and the debug engine.
•
ICDC: The ICDC register is an 8-bit control register for the in-circuit debugger. All bits in this register are set/reset by the debug
engine. It is mapped to the peripheral register space and is read only by the CPU.
•
ICDF: The ICDF register is an 8-bit register and is used to provide system status to the host system, the debug engine, and the
CPU during debug operation. This register is mapped to the peripheral register space and read/write accessible by the CPU and
the debug engine.
•
ICDA: The ICDA register is a 16-bit register that is primarily used to specify an address for ROM assisted operations. The ICDA
is mapped to the peripheral register space and is read only by the CPU. It is read/write accessible by the debug engine. The
ICDA may also be used as a bit mask for register access breakpoints (REGE = 1).
•
ICDD: The ICDD register is a 16-bit register that is used to store data for ROM assisted operations. The ICDD is mapped to the
peripheral register space and is read only by the CPU. It is read/write accessible by the debug engine. The ICDD may also be
used as the bit compare match data for register access breakpoints (REGE = 1).
12.2 In-Circuit Debug Peripheral Registers
The MAXQ7667 in-circuit debug peripheral registers are described here. All the in-circuit debug peripheral registers are directly acces-
sible by the microcontroller through the module/index address.
12.2.1 In-Circuit Debug Temporary 0 Register (ICDT0)
The ICDT0 register is read/write accessible by the CPU only in background mode or debug mode. This register is intended for use by
the utility ROM routine as temporary storage to save registers that might otherwise have to be placed in the stack. This register is
cleared after a power-on reset or by a test-logic-reset TAP state.
Register Description:
In-Circuit Debug Temporary 0 Register
Register Name:
ICDT0
Register Address:
Module 02h, Index 18h
Bits 15 to 0: In-Circuit Debug Temporary 0 Register Bits 15:0 (ICDT0[15:0])
Bit #
15
14
13
12
11
10
9
8
Name
ICDT015
ICDT014
ICDT013
ICDT012
ICDT011
ICDT010
ICDT09
ICDT08
Reset
0
0
0
0
0
0
0
0
Access
s
s
s
s
s
s
s
s
Bit #
7
6
5
4
3
2
1
0
Name
ICDT07
ICDT06
ICDT05
ICDT04
ICDT03
ICDT02
ICDT01
ICDT00
Reset
0
0
0
0
0
0
0
0
Access
s
s
s
s
s
s
s
s
s = special (read/write access only in background or debug mode)