Maxim Integrated MAXQ7667 - Manual (Page 61)

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MAXQ7667 User’s Guide
4.1.19 General Register (GR)
Register Description: General Register
Register Name: GR
Register Address: Module 0Eh, Index 05h
Bits 15 to 0: General Register Bits 15:0 (GR[15:0]). This register is intended primarily for supporting byte operations on 16-bit data.
The 16-bit register is byte-readable, byte-writable through the corresponding GRL and GRH 8-bit registers and byte-swappable
through the GRS 16-bit register.
4.1.20 General Register Low Byte (GRL)
Register Description: General Register Low Byte
Register Name: GRL
Register Address: Module 0Eh, Index 06h
Bits 7 to 0: General Register Low Byte Bits 7:0 (GRL[7:0]). This register reflects the low byte of the GR register and is intended pri-
marily for supporting byte operations on 16-bit data. Any data written to the GRL register will also be stored in the low byte of the GR
register.
Bit # 15 14 13 12 11 10 9 8
Name GR15 GR14 GR13 GR12 GR11 GR10 GR9 GR8
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit # 7 6 5 4 3 2 1 0
Name GR7 GR6 GR5 GR4 GR3 GR2 GR1 GR0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
r = read, w = write
Note: This register is cleared to 0000h on all forms of reset.
Bit # 7 6 5 4 3 2 1 0
Name GRL7 GRL6 GRL5 GRL4 GRL3 GRL2 GRL1 GRL0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
r = read, w = write
Note: This register is cleared to 00h on all forms of reset.