Maxim Integrated MAXQ7667 - Manual (Page 179)

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MAXQ7667 User’s Guide
9.4 Resetting the SPI Port
Any system reset completely resets the SPI. Partial resets occur whenever the SPI-enable bit (SPIE) is cleared. Whenever SPIE is
cleared, the following occurs:
• Any transmission currently in progress is aborted.
• The shift register is cleared.
• The SPI state counter is cleared, making it ready for a new transmission.
• All the SPI port logic is defaulted back to being general-purpose I/O pins.
These items are reset only by a system reset:
• All control bits in the SPICN register.
• All control bits in the SPICF register.
• The status flags SPIC, ROVRF, WCOL, and MODF.
A mode-fault condition (MODF = 1) also resets flags and mode settings in the SPI port. The following bits are reset by a mode-fault
condition:
1) The master MSTM bit is cleared (0) to reconfigure the device as a slave.
2) The SPIEN bit is cleared (0), disabling the SPI port.
3) MODF is set (1).
9.5 Oscillator/Clock Power-Saving Management Modes
Once the complete source and mode configuration of the µC is complete, the program can continue to configure all the modules (ADC,
timers, DIO, interrupt, etc.). Once the µC is completely configured and operating, the low-power modes can then be enacted to reduce
power consumption. The MAXQ power-saving modes are designed to place the µC in a stop mode to reduce power until a task must
be completed. There are several methods for leaving the power management mode and returning to normal operation, including:
• External interrupt from an external pin configured to interrupt the µC
• Detection of SPI bus activity
• An interval timer interrupt
These wake-up events allow the µC to return to normal operation. Once the task is complete, the µC can then be put back into stop
mode until the next task need be completed.
9.5.1 Stop Mode
The MAXQ stop mode is the lowest power mode. When stop (sleep) mode is used, the clock source is gated off from the µC. The exter-
nal clock ports are shut down and only the internal RC oscillator continues to run, to monitor an event that would wake the µC. The fol-
lowing events wake the µC from stop mode and resume normal operation.
• External interrupt from an external pin is configured to interrupt the µC
• Detection of SPI bus activity
• An interval timer interrupt